Dedicated and results-driven Pre-Silicon Verification Engineer with 6 years of experience in formal and dynamic verification methodologies (2 of them as part time) . Demonstrated expertise in ensuring the correctness and functionality of digital designs through rigorous verification processes. Proficient in utilizing formal verification techniques, dynamic verification methodologies, and industry-standard tools to validate complex RTL designs. Skilled in collaborating with cross-functional teams to deliver high-quality silicon designs on schedule. Adept at problem-solving, critical thinking, and adapting to evolving project requirements. Passionate about continuous learning and staying abreast of emerging technologies in the field of pre-silicon verification.
Expertise in formal verification methodologies such as model checking, equivalence checking, and property checking
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