VLSI verification engineer at Chain-Reaction with experience in working on a complex Asic integrating digital and analog design (mixed-signal).
I am hardworking, highly motivated and a fast and independent learner. Interested in Asic and SoC verification,logic design and Chip architecture. Looking for my next challenge where I can harness my abilities and contribute my vast experience, while further expanding my expertise.
Define and implement the technology of the Asic independently and in a system as part of the Asic and system bring-up.
Functional and RTL verification of innovative Asics for Bitcoin mining
Digital logic verification
Chip and logic design - Plan and design RTL blocks - self projects
SystemVerilog (SV) and OOP
Virtuoso
Python programming and scripts
Git and GitHub
C(CPP) Programming
Verilog
Perl
Unix and Shell scripts
Embedded system
Self and independent learning
Teamwork
Problem solving
02-2015 - 11-2016
Combat Support Commander.