Summary
Overview
Work History
Education
Skills
Accomplishments
Military Service
Languages
Timeline
Generic

Maxim Zonis

Staff Engineer | Senior Engineering Technical Lead | Test And Product Development Engineering Architect
Haifa

Summary

Staff engineer, Manufacturing Test Architect and Senior Manufacturing Analog/Digital Test Engineer. Vastly experienced in leading and driving product definition, Power/Thermal management on Client, Server devices CPUs, High volume test and manufacturing, Power and performance optimization, tester and system device validation, power binning algorithms, yield and bin split optimizations, digital and analog content definition and development. Experienced in Linux, Perl, Python, Data analysis, digital and analog content types, Thermal manufacturing topics and Power delivery.

Overview

11
11
years of professional experience
5
5
years of post-secondary education

Work History

Senior Staff Engineer | Chief Test Architect

Intel Corporation
01.2021 - Current
  • Collaborated with cross-functional teams to deliver high-quality products on time and within budget constraints.
  • Managed vendor relationships effectively to ensure timely delivery of materials while minimizing costs.
  • Spearheaded the design of advanced components that improved overall product functionality and user experience.
  • Implemented continuous improvement initiatives that significantly reduced waste in the manufacturing process.
  • Increased production capacity by designing and implementing new manufacturing processes.
  • Standardized documentation practices across the team, leading to more efficient knowledge sharing among colleagues.
  • Developed innovative solutions for complex engineering problems, resulting in increased product reliability.

IC/CPU Test Architect - Manufacturing

Intel Corporation
01.2021 - Current
  • Leading Pre/Post Silicon Manufacturing architecture and manufacturing program development of various domains including Power/Thermal, Analog, Digital, along with Manufacturing thermal solution definition(including numerous evaluations of suppliers), power and performance configuration, power management from manufacturing perspective, product's binning, and test flow definition for optimized power/thermal behavior throughout tests execution
  • Leading cross organizations/business units working groups, which included various design teams, high volume manufacturing equipment development, process development, quality and reliability and architecture teams for Core and SoC segments.
  • Implemented risk-based testing approaches, prioritizing critical functionalities for more focused testing efforts, along with developing various innovative features and testing methodologies for bin split improvement, power management optimization and overall performance maximization.
  • Defining overall power/thermal manufacturing architecture and behavior prediction for future products(client and server), including potential issues mapping and solution space definition
  • Leveraged advanced debugging techniques to identify defects early in the development cycle, reducing overall project timelines and cost.
  • Supported incident management efforts by providing expert guidance in troubleshooting and resolving production issues.

Senior IC/CPU Test Engineer

Intel Corporation
01.2019 - 01.2021
  • Definition and Development of analog related tests for manufacturing flow execution, like : Digital Thermal sensor, SICC, Voltage regulators.
  • Close collaboration on test definition and manufacturing requirements with Power Delivery, Power management and Power performance design teams, along with Tester development team.
  • Mutual work with Process architecture, along with Chief SoC and Core architecture teams for success criteria definition per each test, quality and reliability targets characterization and performance target assurance.

Product Development Engineer

Intel Corporation
11.2014 - 01.2019
  • Test program development of Power/Thermal related tests for manufacturing flow execution on CPU products.
  • Thermal control optimization flow definition for required product targets and maximization of products performance.
  • Data analysis and decision making of Thermal control optimization measures and relevant tests calibration flow for performance improvement and reaching required products quality.

Product Development Engineering Student

Intel Corporation
11.2013 - 11.2014
  • Executing various validation activities for Power/Thermal related tests, including debug sessions, data analysis and providing feedback to Test owners for optimization process and production release.

Education

Bachelor of Science - Electrical and Electronics Engineering

Braude Academic College
Karmiel, Israel
05.2012 - 05.2017

High School Diploma -

Bosmat Technical High School
Haifa, Israel
04.2001 -

Skills

Power performance optimization and management techniques

Accomplishments

Presenter and Publisher at numerous conferences( IEEE, DTTC, IMEC, IMTES) with best of DTTC presentation awards in 2019 and 2022.

Military Service

2011 - 2006 - IDF Air Force, F16 electronics technician, Technical instructor and Technical course commander. 

Commanded on numerous technical courses, along with technical service on F16 aircrafts.

Languages

English
Hebrew
Russian
Romanian

Timeline

Senior Staff Engineer | Chief Test Architect

Intel Corporation
01.2021 - Current

IC/CPU Test Architect - Manufacturing

Intel Corporation
01.2021 - Current

Senior IC/CPU Test Engineer

Intel Corporation
01.2019 - 01.2021

Product Development Engineer

Intel Corporation
11.2014 - 01.2019

Product Development Engineering Student

Intel Corporation
11.2013 - 11.2014

Bachelor of Science - Electrical and Electronics Engineering

Braude Academic College
05.2012 - 05.2017

High School Diploma -

Bosmat Technical High School
04.2001 -

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Maxim ZonisStaff Engineer | Senior Engineering Technical Lead | Test And Product Development Engineering Architect